How are photovoltaic cells manufactured?

Photovoltaic cells, the core components that convert sunlight directly into electricity, are manufactured through a sophisticated, multi-step industrial process that transforms raw silicon into efficient, durable solar panels. The journey from sand to solar power involves precision engineering, advanced materials science, and rigorous quality control, ensuring the cells meet stringent performance and reliability standards. This deep dive will walk you through each critical phase, packed with technical details and real-world data to give you a clear picture of modern solar cell production.

It all starts with the primary material: silicon. Silicon is abundant, sourced from quartzite gravel or high-purity silica sand. The first major step is producing metallurgical-grade silicon (MG-Si), which is about 98-99% pure. This is done by heating silica with carbon in a submerged arc furnace at temperatures exceeding 2,000°C. The chemical reaction, SiO₂ + 2C → Si + 2CO, yields solid silicon. However, for solar applications, this isn't pure enough. The silicon must be refined to semiconductor-grade purity, often called polysilicon, with impurities reduced to less than one part per billion (ppb). The dominant method for this is the Siemens process, where MG-Si is reacted with hydrochloric acid to form trichlorosilane gas (SiHCl₃). This gas is then distilled to ultra-high purity and deposited onto thin rods of pure silicon in a chemical vapor deposition (CVD) reactor at around 1,100°C, forming beautiful, shiny polysilicon rods.

Next, these polysilicon rods are melted down in a crucible, often made of quartz, within an inert argon atmosphere furnace. A single crystal seed is dipped into the melt and slowly pulled upward while rotating. This is the Czochralski (CZ) method, the most common technique for creating monocrystalline silicon ingots. The process is incredibly controlled; the pull speed and temperature gradient determine the ingot's diameter and crystal quality. A typical ingot might be 2 meters long and have a diameter of 200mm to 300mm, weighing several hundred kilograms. For multicrystalline silicon, the polysilicon is melted in a square quartz crucible and allowed to cool directionally, forming a block of silicon with multiple crystal grains. While slightly less efficient, this method is cheaper. The ingot or block is then squared and sliced into ultra-thin wafers using diamond-coated wire saws. This is a loss-intensive step; about 40-50% of the valuable silicon is lost as kerf (sawdust). Wafers today are remarkably thin, typically around 160-180 micrometers (µm)—thinner than a human hair—to reduce material cost.

The raw silicon wafer is not yet a solar cell. It must undergo several key processing steps to become photoactive. First is texturing. For monocrystalline wafers, this involves an anisotropic alkaline etch (usually with potassium hydroxide or sodium hydroxide) that creates microscopic pyramids on the surface. This texture reduces light reflection from about 30% down to less than 10%, trapping more sunlight inside the cell. Multicrystalline wafers use an acidic isotropic etch to create a less uniform but still effective textured surface.

Following texturing, the wafer undergoes diffusion to create the p-n junction, the heart of the solar cell. The wafer is p-type (boron-doped). It is placed in a high-temperature furnace (800-900°C) where phosphorus atoms are introduced, typically from a phosphorus oxychloride (POCL₃) gas source. These atoms diffuse into the wafer surface, creating a thin n-type layer. This forms the crucial electric field. A typical junction depth is 0.3-0.5 µm. After diffusion, phosphorus silicate glass (PSG) formed on the surface is removed by a hydrofluoric acid etch.

To prevent current leakage at the edges where the n-type layer wraps around, edge isolation is performed. This is often done by plasma etching, which removes the peripheral n-type layer, defining the active cell area.

Then comes anti-reflective coating (ARC) and passivation. A thin layer of silicon nitride (SiN₃:H) is deposited onto the front surface using Plasma-Enhanced Chemical Vapor Deposition (PECVD). This coating serves a dual purpose: it further cuts reflection (bringing it below 2%) and, crucially, it passivates the silicon surface, reducing the recombination of electrons and holes, which boosts voltage and efficiency. Advanced cells may also have a passivating layer, like aluminum oxide (Al₂O₃), on the rear side.

The final major fabrication step is metallization—printing the electrical contacts. Screen printing is the industry standard. A silver paste is printed on the front in a fine grid pattern (busbars and fingers) to collect current while minimizing shadowing. An aluminum paste is printed over almost the entire back surface. The cell is then fired in a fast, high-temperature (700-800°C) belt furnace. This sinters the metal pastes, driving them into the silicon to form ohmic contacts, and the aluminum also creates a back-surface field (BSF) that improves performance. Recent trends move towards more advanced contact schemes like PERC (Passivated Emitter and Rear Cell), which adds a laser-opening step to the rear passivation layer before aluminum printing, or heterojunction (HJT) technology that uses thin layers of amorphous silicon.

After manufacturing, every cell is rigorously tested under Standard Test Conditions (STC: 1000W/m² irradiance, 25°C cell temperature, AM1.5 spectrum) and sorted by power output into efficiency bins. This ensures consistent performance when they are assembled into modules. The table below summarizes the key performance metrics for mainstream commercial cell technologies:

Once the cells are ready, they are sent to module assembly lines. Here, they are electrically connected in series (typically 60, 72, or 120 cells for a module) using copper ribbons soldered to the busbars. This stringing process is highly automated. The strings are then laid out between two layers of ethylene-vinyl acetate (EVA), a transparent polymer encapsulant. A high-transmission, low-iron tempered glass sheet goes on the front, and a multi-layered polymer backsheet (providing insulation and weather resistance) goes on the rear. This "sandwich" is laminated in a vacuum laminator at about 150°C, where the EVA melts and cures, bonding everything into a solid, waterproof unit.

A critical post-lamination step is framing. An aluminum frame is mechanically attached to the edges with clips or adhesive. This provides structural rigidity, protects the glass edges, and allows for easy mounting on racks. A junction box is then adhered to the backsheet. This box contains bypass diodes (usually one for every 20-24 cells) which prevent power loss from shading, and it's where the positive and negative output cables are terminated.

The finished module undergoes a final round of stringent testing. This includes a flash test to measure its peak power output (Pmax), open-circuit voltage (Voc), and short-circuit current (Isc) against its nameplate rating. It also undergoes high-potential (hi-pot) testing, where a high voltage is applied to check for insulation flaws, and electroluminescence (EL) imaging, which uses an infrared camera to detect micro-cracks, poor contacts, or other defects invisible to the naked eye. Only modules passing all these checks are packaged and shipped for installation in solar farms, commercial rooftops, or residential systems, where they will reliably generate clean electricity for 25 to 30 years or more. The entire manufacturing chain, from polysilicon to packaged module, represents a pinnacle of modern industrial scale and precision, continuously evolving to deliver higher efficiency and lower cost per watt. For a deeper look at the specific materials and innovations driving this industry forward, you can explore resources from leading manufacturers like this detailed overview on photovoltaic cells.

Beyond the mainstream crystalline silicon process described, the industry is actively researching and scaling next-generation technologies. Thin-film solar cells, such as those made from Cadmium Telluride (CdTe) or Copper Indium Gallium Selenide (CIGS), are manufactured using entirely different processes. For CdTe, layers are deposited onto glass in a continuous vacuum process: first a transparent conductive oxide (TCO), then cadmium sulfide (CdS), followed by a thick layer of CdTe, and finally back contacts. The entire substrate moves through deposition chambers, enabling high-throughput, roll-to-roll style production. Perovskite solar cells, a promising emerging technology, are typically fabricated using solution-based techniques like spin-coating or slot-die coating, where liquid precursors are deposited and then crystallized. The quest for higher efficiency also drives the development of tandem cells, which stack two different cell materials (like perovskite on top of silicon) to capture a broader range of the solar spectrum. These require even more complex, multi-step deposition and interconnection processes within a single device.

The environmental and resource aspects of manufacturing are integral to the story. Producing high-purity silicon is energy-intensive, with the Siemens process historically consuming 50-60 kilowatt-hours per kilogram (kWh/kg) of polysilicon. Modern, closed-loop fluidized bed reactor (FBR) processes have reduced this to around 25-30 kWh/kg. Water usage is another critical factor; wafer slicing, cleaning, and texturing require large amounts of ultra-pure water, with a typical fab using millions of gallons per day. Leading manufacturers implement extensive water recycling systems, aiming for recovery rates above 90%. The industry is also focused on reducing its carbon footprint and managing material lifecycles, from sourcing conflict-free minerals to establishing robust end-of-life recycling programs for panels to recover glass, aluminum, silicon, and silver.